PhD students Sujay Pandit (left) and Aradhana Mohan Parvathy

Two PhD students from Purdue University’s Elmore Family School of Electrical and Computer Engineering have been named winners of the highly competitive Qualcomm Innovation Fellowship for their groundbreaking research aimed at enhancing energy efficiency in modern computing systems. Sujay Pandit and Aradhana Mohan Parvathy are students of Anand Raghunathan, Silicon Valley Professor of Electrical and Computer Engineering. The fellowship recognizes innovative research in areas critical to the future of mobile and edge computing, with winners selected from leading universities worldwide.

“Winning the Qualcomm Innovation Fellowship is both a validation that our research addresses critical challenges and an encouragement to push the boundaries even further,” said Pandit. 

Pandit and Parvathy say they are grateful to Qualcomm for recognizing the potential of this work, and to Prof. Raghunathan for his invaluable mentorship and continuous support. The duo earned this global honor for their proposal titled "Machine Learning-Based Power Estimation for Reconfigurable SoCs." Their research addresses a significant challenge in designing Systems-on-Chip (SoCs)—the compact yet powerful processors integral to smartphones, laptops, data centers, and numerous electronic devices. As SoCs and their applications grow increasingly complex, accurately predicting their power consumption becomes more challenging, thereby slowing down the design process. Designers must make early-stage decisions balancing performance, cost, and energy efficiency. Although current power estimation tools are highly accurate, they often prove slow and difficult to scale for larger, more advanced systems.

To address these challenges, the students aim to build upon Pandit’s earlier work, ML-Power, a machine learning framework that significantly accelerates power estimation while preserving high accuracy.

The innovation consists of two key components:

• PACE employs machine learning to replace slower, conventional simulation techniques, predicting chip activity efficiently without sacrificing detailed accuracy.
• SCOPE targets power distribution across the chip over time, substituting traditional, computationally expensive power computations with simple and accurate, machine learning models. This significantly accelerates power prediction compared to current industry and academic practices.

ML-Power is up to 300 times faster than commercial tools currently used in the chip industry, while keeping per-cycle power estimation error below 7%. However, Pandit and Parvathy acknowledge that the original ML-Power framework has limitations, which they aim to resolve through their current proposal and collaboration with Qualcomm.

“With the rapid scaling of chips to support emerging applications like AI and edge computing, there’s a growing need to rethink how we design them efficiently,” said Parvathy. “Our research focuses on leveraging AI to make chip design faster and more energy-efficient, enabling better design decisions early in the process.”

The Qualcomm Innovation Fellowship is a prestigious award that encourages students to push technological boundaries through innovative ideas and practical solutions. Recipients receive funding and mentorship from Qualcomm engineers, bridging the gap between academic research and industry applications.